With the continuous development of the component testing industry, chip testing companies have sprung up, and LNEYA has also introduced component testing equipment for chip testing.
The test vector of the chip inspection company is stored in the vector memory, and each row of individual vectors represents the original data of a single test cycle. The data input from the vector memory is combined with the timing, waveform format, and voltage data, and applied to the device under test through the IC circuit. The output of the device under test is compared to the data stored in the vector memory by the comparison circuit at the appropriate sampling time. This type of testing is called a storage response. In addition to the input and output data of the device under test, the test vector may also contain some operational instructions of the test system. For example, it is necessary to include timing information, etc., because timing or waveform format, etc. may need to be switched in real time between cycles. The input driver may need to be turned on or off, and the output comparator may also need to selectively switch between cycles. Many test systems also support micro-ops such as jumps, loops, vector repeats, subroutines, and so on. Different testers may have different tester instructions, which is one of the reasons why vector conversion is required when transferring test programs from one test platform to another.
For more complex chips, the chip test company test vector is generally extracted from the simulation data in the chip design process. The simulation data needs to be rearranged to meet the format of the target test system, and some processing is required to ensure proper operation. In general, test vectors are not simply composed of millions of independent vectors. Test vectors or simulation data can be done by design engineers, test engineers or verification engineers, but to ensure successful vector generation, you must have a very comprehensive understanding of the chip itself and the test system. When the functional test is performed, the test system applies the input waveform to the device under test, and monitors the output data one pin at a time. If any of the output data does not meet the expected logic state, voltage or timing, the test result is recorded as an error.
The various test equipments introduced by the chip inspection company are more conducive to the development of the chip industry. Of course, users also need to choose reliable when they choose.
(This article source network, if there is infringement, please contact delete, thank you！)
