The most basic part of making a chip is design-tape-package-test. The chip cost structure is generally 20% of labor cost, 40% of tape, 35% of package, and 5% of test. The test is actually the most in all aspects of the chip. "Cheap" step, but the test is the final level of product quality. If there is no good test, the product PPM [Million Failure Rate] is too high, and the return or compensation is far from 5% of the cost.
What tests do chips need to do?
There are three main categories: chip functional testing, performance testing, and reliability testing. The three major tests for chip products are indispensable for listing.
Reliability test: The chip has passed the function and performance test, and a good chip has been obtained, but will the chip be damaged by static electricity, whether it can work normally in extreme environments, and the life of the chip, etc. Test to evaluate.
Reliability testing is mainly to apply various harsh environments to the chip, such as ESD static electricity, which is to simulate the human body or simulated industrial body to apply a momentary large voltage to the chip. Another example is aging HTOL [High Temperature Operating Life], which is to accelerate chip aging at high temperature and then estimate the chip life. There is also HAST [Highly Accelerated Stress Test] to test the moisture resistance of the chip package. The product to be tested is tested under severe temperature, humidity and pressure. Will the moisture penetrate into the package along the interface of the colloid or colloid and lead frame Thereby damaging the chip.
IC Product Level reliability test items (IC Product Level reliability test items)
1. Life test items: EFR, OLT (HTOL), LTOL
①EFR: Early fail rate test (Early fail Rate Test)
Purpose: To evaluate the stability of the process, accelerate the defect failure rate, and remove products that have failed due to natural causes.
Test conditions: Dynamically increase the temperature and voltage to test the product within a specific time
Failure mechanism: defects in materials or processes, including failures due to production such as oxide layer defects, metal etching, ion contamination, etc.
②HTOL / LTOL: High / Low Temperature Operating Life Test
Purpose: To evaluate the durability of a device over time under overheating and overvoltage conditions
Test condition: 125 ℃, 1.1VCC, dynamic test
Failure mechanism: electron migration, rupture of oxide layer, interdiffusion, instability, ion contamination, etc.
Passing IC for 1000 hours of testing at 125°C can guarantee 4 years of continuous use, and 2000 hours of testing for 8 years of continuous use;
The test at 150 ℃ for 1000 hours is guaranteed for 8 years and 2000 hours for 28 years.
2. Environmental test items (Environmental test items)
PRE-CON, THB, HAST, PCT, TCT, TST, HTST, Solderability Test, Solder Heat Test
①PRE-CON: Precondition Test
Purpose: To simulate the durability of IC storage under certain humidity and temperature conditions before use, that is, the reliability of IC storage from production to use.
Test Flow (Test Flow):
Step 1: SAM (Scanning Acoustic Microscopy)
Step 2: Temperature cycling
-40°C (or lower) ~ 60°C (or higher) for 5 cycles to simulate shipping conditions
Step 3: Baking
At minimum 125 ℃ for 24 hours to remove all moisture from the package
Step 4: Soaking
Using one of following soak conditions
-Level 1: 85 ℃ / 85% RH for 168 hrs (It does not matter how long the storage and transportation time)
-Level 2: 85 ℃ / 60% RH for 168 hrs (storage and transportation time is about one year)
-Level 3: 30 ℃ / 60% RH for 192 hrs (storage time is about one week)
Step5: Reflow (reflow soldering)
240 ℃ (-5 ℃) / 225 ℃ (-5 ℃) for 3 times (Pb-Sn)
245 ℃ (-5 ℃) / 250 ℃ (-5 ℃) for 3 times (Lead-free)
* choose according the the package size
Step6: Ultrasonic scanner SAM (Scanning Acoustic Microscopy)
②THB: Accelerated Temperature Humidity and Bias Test (Temperature Humidity Bias Test)
Objective: To evaluate the resistance of IC products to moisture under high temperature, high humidity, and bias conditions to accelerate their failure process.
Test conditions: 85 ℃, 85% RH, 1.1 VCC, Static bias
③HAST: Highly Accelerated Stress Test (HAST: Highly Accelerated Stress Test)
Objective: To evaluate the resistance of IC products to humidity under high temperature, high humidity, and high pressure under bias conditions to accelerate their failure process.
Test conditions: 130 ℃, 85% RH, 1.1 VCC, Static bias, 2.3 atm
TCT: Temperature Cycling Test (Temperature Cycling Test)
Purpose: To evaluate the contact yield of the interface between metals with different thermal expansion coefficients in IC products. The method is to repeatedly change the circulating air from high temperature to low temperature.
Condition B: -55 ℃ to 125 ℃
Condition C: -65 ℃ to 150 ℃
TST: High and low temperature impact test (Thermal Shock Test)
Purpose: To evaluate the contact yield of the interface between metals with different thermal expansion coefficients in IC products. The method is to repeatedly change the circulating liquid from high temperature to low temperature.
Condition B:-55 ℃ to 125 ℃
Condition C:-65 ℃ to 150 ℃
HTST: High Temperature Storage Life Test
Purpose: To evaluate the life time of IC products under high temperature conditions for several years without working conditions before actual use.
Test condition: 150 ℃
SHT Test: Solder Heat Resistivity Test (Solder Heat Resistivity Test)
Objective: To evaluate the sensitivity of IC to transient high temperature
Test method: invade 260 ℃ tin basin for 10 seconds
It is not difficult to see that the above-mentioned quality test and reliability test items of the chip have one thing in common: temperature, as low as -40 ℃ and as high as 250 ℃, the temperature requirements of each test project are different. Although the test is the smallest in the entire chip production process, it can also be seen that it is crucial. The test results not only reflect the yield rate of the fab or even the efficiency and life rate of the actual use in the later period. Related to the cost of chip production.
In order to have a certain proportion in the chip industry, LNEYA specially developed and produced several models of temperature control systems, TES series and AES series. Using advanced liquid temperature control
technology, the main role is to simulate the role of temperature testing in the chip / wafer testing process, with a wide temperature orientation and thermal cycle, temperature range -92°C ~ 250°C, suitable for various test projects Temperature requirements to solve the problem of temperature control lag during the test.